Name: Design of High-Performance CMOS Voltage-Controlled Oscillators
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ISBN: 978-1-4613-5414-7

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The textbook "Design of High-Performance CMOS Voltage-Controlled Oscillators" offers a comprehensive analysis and modeling framework for phase noise in CMOS ring oscillators. It addresses both linear and nonlinear operating modes and emphasizes the need to achieve fast rail-to-rail switching to minimize phase noise. A central theme is the potential dominance of flicker noise in the bias circuit, particularly at low offset frequencies, which is significant for narrow bandwidth PLLs. The book defines the effective Q-factor (Qeff) for ring oscillators and predicts its increase in CMOS processes with smaller feature sizes. The analysis of phase noise is validated through simulations and measurement results. Additionally, it discusses the challenge of improving the noise immunity of PLLs in environments with high digital activity, such as microprocessor chips.

Actual product image Design of High-Performance CMOS Voltage-Controlled Oscillators (English, Paperback, Liang Dai, Ramesh Harjani)

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Design of High-Performance CMOS Voltage-Controlled Oscillators

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