Bernd Schwarz

The expanded 8th edition of this standard work supplements the book's previous presentation of VHDL simulation with specific user instructions for the VHDL simulator ModelSim. The use of the simulation and synthesis tool Vivado, which is required to implement VHDL code in newer FPGAs from Xilinx, is also presented. Implementations for Artix FPGAs are presented and discussed using selected examples.